1. Field of the Invention
The present invention relates to a method of manufacturing a multilayer printed wiring board.
2. Discussion of the Background
In order to address the needs of faster and smaller electronic devices, there have been demands for finer conductor circuits of a multilayer printed wiring board. Further, in order to meet the demands for finer products, an idea has been offered for a method of forming conductor circuits with the use of a so-called semi-additive method in terms of a method of manufacturing a multilayer printed wiring board.
Laid-Open Japanese Patent Publication No. 2003-31927, the contents of which is incorporated herein by reference in its entirety, discloses a method of forming conductor circuits on an interlaminar resin insulating layer, the method including forming an electroless nickel plating film on the entirety of the surface of a laminate board without a copper foil, forming a plating resist on this electroless nickel plating film, and forming a patterned copper plating film. Also included is subsequently stripping the plating resist, and undertaking a selective etching to remove the electroless nickel plating film, other than the conductor pattern, which has become unnecessary.
The above-noted patent document states that the method allows, since it has the electroless nickel plating film removed with a selective etching, the patterned copper plating layer to remain in nearly the same shape as it was during the etching, and that it presents an advantage for finer conductor circuits.